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Table 1 Mismatch for CCII current and voltage DC gains based on the Monte Carlo post-layout simulation and experimental results

From: A current-mode system to self-measure temperature on implantable optoelectronics

Performance

MC simulation results

Experimental results

Mean

StDev (%)

Meana

StDev (%)

Current gain

0.9947

9.24

1.0033

0.13

Voltage gain

0.9997

0.28

0.9826

0.15

  1. aBased on the experiments carried out on seven different chips